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• Who invented the computer?http://www.turing.org.uk/turing/scrapbook/computer.html

• Computer terminology -- Wikipedia list:http://en.wikipedia.org/wiki/Computer_terms

• Biography of Alan Turing: http://en.wikipedia.org/wiki/Alan_Turing

• Godel's theorem -- link to the original paper:http://www.cs.auckland.ac.nz/CDMTCS/chaitin/georgia.html

• Turing machines: http://en.wikipedia.org/wiki/Turing_machine

• Intel page on Moore's Law: http://www.intel.com/technology/mooreslaw/

Conceptually, all computer systems consist of the following major units: Central Processing Unit (CPU), input and output devices, and external storage devices .

Central Processing Unit

The Central Processing Unit (CPU) is the heart of every computer.Essentially CPUs are miniature circuit boards etched onto the surface of a silicon wafer that has been coated with impurities (doped) to give the surface the necessary electrical properties. The board is etched with a circuit diagram and embedded in a ceramic block. Extending from this ceramic block are pins or wires that attach the CPU to the system bus, enabling it to communicate with the computer memory, keyboard, display and other parts of the system. The CPU consists of:

1. Microprocessor comprising (a) control and sequencing unit, (b) arithmetic and logic units (ALU), and (c) specialized memory registers or accumulators connected to ALU ;

2. Internal Memory comprising (a) Random Access Memory (RAM), and (b) Read Only Memory (ROM);

3. Communication lines (bus system); and

4. Input and Output ports.

Operating systems are intimately connected to the computer architecture. The operating system is connected with the organization of memory into a hierarchy i.e. disk, main memory, cache memory and CPU registers. During the execution of a program a record of interest is brought from the disk into the main memory. The operating system decides which data resides at what level in this hierarchy. Direct Memory Access (DMA) forms the very foundation of multiprogramming.

CPU Registers

The CPU has several types of registers:

Memory Address Register (MAR)—It contains the address of the memory location which is activated and accessed for both the LOAD and STORE instructions.

Memory Buffer Register (MBR) – It stores the data temporarily before it is transferred to/from the desired memory location.

Program Counter (PC) –It contains an address of the “next” instruction to be executed. The computer begins at the first executable instruction; when it is executed the “PC” is incremented by 1 so that it points to the next instruction.

Stack Pointer (SP) –A stack is a data structure which has a Last In First Out (LIFO) property. This is a very useful data structure to implement nested sub-routines.

General Purpose Registers –Shown as R0, R1 in the diagram, which can be addressed in various assembly instruction. There may be 2,4,8,16 or 32 such registers. When there is only one such register it is called an accumulator in the literature of microprocessors.

Instruction Register (IR) –It holds an instruction before it is decoded and executed. To executed an instruction, the instruction whose address is given by the “PC” has to be fetched from memory into their. This constitutes the fetch cycle. This is followed b the “execute cycle” in which the instruction is decoded and executed.

Temporary Registers – are registers within the ALU to hold the data temporarily .There are input registers and an output register in the ALU containing the result from any operation.

If a computer has 16 different instruction such as ADD, SUB, MUL, DIV, LDA, STA, etc. a specific decoder circuit gets activated.

The control unit retrieves both data and instruction from memory, decodes the requested instruction and loads the chips’ registers (the temporary memory areas in the chip) with both the decoded instruction and the data to be handled. This process is referred to as the instruction cycle (l-cycle) of the chip. The last step of the l-cycle is to signal the ALU to perform the instruction that has been loaded by the control unit into the instruction register. The ALU thus performs the requested instruction. The ALU stores the result of this instruction in a special register called the accumulator, and then returns control to the control unit. This process is called the execution cycle (E-cycle). The l-cycle and E-cycle together are referred to as a machine cycle.

What makes one CPU preferable to another depends on the principle task to be performed. For general purpose computers, two important factors are (1) processor speed and (2) the robustness of the chips’ instruction set. CPUs based on the Complex instruction Set Computing (CISC) technology posses a complex and robust instruction set. These CPUs sacrifice speed to gain the ability of the CPU to decode and perform a wide variety of instructions. This makes it easier for software developers to write more robust and powerful application programs. Unfortunately, the advantage gained carries with it a performance penalty, in that the processor must spend extra time decoding and executing the instruction. Larger instruction sets occupy more space on a silicon chip which means less room for other components.

Unlike CISC-based processors, Reduced Instruction Set Computing (RISC) processors purposely possess a limited set of instruction, which reduces the time it must spend in decoding and executing an instruction. The Fairchild CLIPPER, the first non-proprietary 32 bit RISC-CPU reduced the instruction set to about 120 instructions, as against over 300 on many 32 bit chips. Major improvements in performance occur when a RISC chip is customized for a particular function or compiler language.

Thus, the raw processing power of the CPU is increased. Nevertheless the effective through put of data through the processor may not be better, or may be even worse than that of the CISC based CPUs. The reason is that the software developer must redevelop the instructions that are not provided directly by the processor. Depending on the quality and efficiency of the code written to provide these services, the effective throughout of the processor for a given task may suffer.